mirror of
https://github.com/cowmonk/cowos.git
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119 lines
3.6 KiB
Text
119 lines
3.6 KiB
Text
#include <stdint.h>
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#include <stddef.h>
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#include <limine.h>
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#define PAGE_PRESENT (1ULL << 0)
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#define PAGE_WRITABLE (1ULL << 1)
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#define PAGE_USER (1ULL << 2)
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#define PAGE_SIZE_2MB (1ULL << 7)
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#define PAGE_SIZE 4096
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// Get hhdm offset
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extern volatile struct limine_hhdm_request hhdm_request;
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extern volatile struct limine_kernel_address_request kernel_address_request;
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// Static storage for page tables
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static uint64_t pdpt[512] __attribute__((aligned(4096)));
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static uint64_t pd[512] __attribute__((aligned(4096)));
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// Get current cr3 value (PML address)
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static uint64_t get_cr3(void)
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{
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uint64_t cr3;
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__asm__ volatile("mov %%cr3, %0" : "=r"(cr3));
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return cr3;
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}
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// Set cr3 to flush TLB
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static void set_cr3(uint64_t cr3)
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{
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__asm__ volatile("mov %0, %%cr3" : : "r"(cr3) : "memory");
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}
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// Convert physical address to virt address using hhdm
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static inline void *phys_to_virt(uint64_t phys)
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{
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if (hhdm_request.response == NULL) {
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// Fallback if hhdm is not available
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return (void *)(phys + 0xffff800000000000ULL);
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}
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return (void *)(phys + hhdm_request.response->offset);
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}
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// Convert virt address to physical address
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static inline uint64_t virt_to_phys(void *virt)
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{
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uint64_t addr = (uint64_t)virt;
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// Check if this is a kernel address
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if (kernel_address_request.response != NULL) {
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uint64_t kernel_virt_base = kernel_address_request.response->virtual_base;
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uint64_t kernel_phys_base = kernel_address_request.response->physical_base;
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// If address is in kernel space, convert using kernel base
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if (addr >= kernel_virt_base && addr < kernel_virt_base + 0x200000) {
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return kernel_phys_base + (addr - kernel_virt_base);
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}
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}
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// Otherwise, in hhdm range
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if (hhdm_request.response == NULL) {
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// Fallback to default if hhdm not avail
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return (addr - 0xffff800000000000ULL);
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}
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return (addr - hhdm_request.response->offset);
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}
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void map_vga_memory(void)
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{
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// Get current PML4 from cr3
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uint64_t cr3 = get_cr3();
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uint64_t *pml4 = (uint64_t *)phys_to_virt(cr3 & ~0xFFF);
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// VGA memory starts at 0xA0000 (640KB)
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// Map entire lower 1MB region for simplcity
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/* For address 0xA0000:
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* PML4 index = 0 (bits 47-39)
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* PDPT index = 0 (bits 38-30)
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* PD index = 0 (bits 29-21)
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* PT index = 160 (0xA0) (bits 20-12)
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*/
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// Check if PML4[0] is present
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if (!(pml4[0] & PAGE_PRESENT)) {
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// Clear PDPT
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for (int i = 0; i < 512; i++) {
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pdpt[i] = 0;
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}
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// Install PDPT (use physical address)
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pml4[0] = virt_to_phys(pdpt) | PAGE_PRESENT | PAGE_WRITABLE | PAGE_USER;
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}
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// Get PDPT (convert physical address from entry to virt for access)
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uint64_t *pdpt_ptr = (uint64_t *)phys_to_virt(pml4[0] & ~0xFFF);
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// Check if PDPT[0] is present
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if (!(pdpt_ptr[0] & PAGE_PRESENT)) {
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// Clear pd
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for (int i = 0; i < 512; i++) {
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pd[i] = 0;
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}
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// Install pd (use physical address)
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pdpt_ptr[0] = virt_to_phys(pd) | PAGE_PRESENT | PAGE_WRITABLE | PAGE_USER;
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}
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// Get pd (convert physical address from entry to virt for access)
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uint64_t *pd_ptr = (uint64_t *)phys_to_virt(pdpt_ptr[0] & ~0xFFF);
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// Check if we can use 2MB pages
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if (!(pd_ptr[0] & PAGE_PRESENT)) {
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// Map the first 2MB as a large page (0x0 - 0x200000)
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// This include VGA memory at 0xA0000-0xBFFFF
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pd_ptr[0] = 0x0 | PAGE_PRESENT | PAGE_WRITABLE | PAGE_USER | PAGE_SIZE_2MB;
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}
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// Flush TLB
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set_cr3(cr3);
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}
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